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Spartan 3 Generation FPGAs Slide 6
The Spartan series integrates hard IP blocks for easy implementation and improved resource utilization, resulting in lower total system cost. The extended Spartan-3A family has DSP48A blocks to improve the complex computation capability of the standard Multiplier/Logic Cell implementation. Real function benchmarking shows a 50 to 1300 logic cell savings by utilizing the DSP48A block. Results also show, an average savings of 300 logic cells or 70% improvement in density by utilizing the DSP48A in the Spartan devices.
PTM Published on: 2009-06-04