When it comes to high resolution digital audio systems, this noise can induce errors as well as increase jitter in the recovered clock signal. They are also susceptible to ACI, Adjacent Channel Interference. Sharp on and off times can be critical. Here the voltage transition to represent timing information is being used. The main objective here is to transmit and recover data without errors. Users also want to recover the clock with a minimal increase in Jitter. Per the SONET Specification, “Jitter is the short term variation of digital signals significant instants from their ideal positions in time”. Within this circuit board, there are ground planes, IC connections, and power supply planes that will have some inherent inductance, capacitance and resistance. These are parasitic impedances that common mode noise will migrate towards. These impedances and noise can also affect the clock and data in other parts of a circuit. As mentioned before, planning a good strategy for grounding and combining power planes together, ground planes together, etc, can significantly improve performance. Keeping digital grounds tied together and separate from analog grounds (which are tied together) is an easy and nice solution. Without getting into too much detail, it is shown here that by utilizing a common mode choke on the USB line, users can improve the noise, and in turn improve the Jitter failure rate. Placing the common mode where the data enters the circuit (right hand side) will have the best effect as opposed to placing it later on in the circuit. Clean the signal as it comes in to prevent issues further on in the circuit. The figure on the right would have the best placement of the common mode choke, right on the input.