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The USB module on Texas Instruments TM4C123x MCUs consists of an integrated controller and PHY. The USB controller has an end point control block, which receives and sends DMA requests from and to the DMA controller. The end point control block is connected to the FIFO RAM controller, and packet Encode/Decode block. This block encodes and decodes the data packets sent and received from the USB transceiver macrocell synchronization block, also known as the UTM synchronization block. The function of this block is to synchronize between the transceiver macrocell and the function controller user supplied clock. The packet encoder/decoder block, which connects the UTM synchronization block to packet encoder/decoder and end point control block, generates the headers for the received packets. It also performs CRC generation and checking. The RAM controller provides an interface to a single block of synchronous RAM, which is used to buffer packets between the MCU and the USB. It takes the FIFO pointers from the endpoint controllers, converts them to address pointers within the RAM block and generates RAM access signals. The FIFO ram controller is connected to the CPU interface, which sends interrupts to the interrupt controller.
