Originally intended as a CPU clock, HCSL came into use for PCI Express reference clocks in the late 1990s. The HCSL output structure is driven by a 14-mA switched current source typically terminated to ground via a 50-Ω resistor, as shown here in the schematic example. Nominal signal swing is 700 mV. The open-drain transistor at the output has fairly high impedance in the range of several kilo-ohms. From an AC standpoint, the output transistor’s impedance is parallel to the 50-Ω load resistor, resulting in an equivalent resistance very close to 50-Ω. Since the traces used in this interface have a characteristic impedance of 50-Ω, any signal reflected from the load will be absorbed at the source. Typically two small resistors, R1 and R2 (shown in the lower diagram), are placed in series with the high-impedance driver. They function as an overshoot limiter by slowing down the rapid rise of current from the output, and have no impact on the impedance matching at the source.