What is meant by universal format translation? In short the Si53302 will accept a wide range of input clock formats, and can then be configured to output any format. The clock input can accommodate CMOS, LVDS, CML, LVPECL and HCSL formats, and each input can be up to ten times different in frequency. The output format is pin-configurable, and independent of the input format. In fact, each bank of five differential outputs can be different formats. Each output bank has its own voltage supply pin, and so will perform level translation between 1.8, 2.5 and 3.3 V. No other buffer in the market does this so easily and without a sacrifice in jitter performance. This means that not only can fewer buffer ICs be used in a clock tree, the user can qualify and maintain fewer buffer ICs across all of the designs. If the output format requirements change, the clock tree design can use the same Si53302, as the format is changed via pin-strapping. Universal format translation means reduced design time, simplified procurement and peace of mind.