In summary, Interleaved PFCs allow a more efficient power factor correction design. They also allow space savings which, with a much smaller inductor, is needed when compared to single stage PFC design. Interleaved PFC also reduces output current ripple since two inductors are sharing one load at different times. DsPIC® digital signal controllers combine the right set of peripherals and computational power to enable Interleaved PFC control with a single device. The reference design presented in this training module offers a starting platform for these types of applications and the modular design of the software makes it easy to understand and easy to add other functions.