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SRAM-Slide11

Rather than using a larger microcontroller, the design makes use of these two 32kB serial SRAMs. The first SRAM chip is used for the high-level TCP layer and stores MP3 data with all metadata. After the data has been processed by the microcontroller, raw MP3 data packets are stored in the second SRAM chip until they are required by the audio decoder. Having raw MP3 files ready for the decoder eases its processing requirements. The first SRAM device requires 4 connections to the microcontroller: data in, data out, clock, and chip select. These connections are shown in red between the SRAM chip and the MCU. Three of these connections use the micro’s built-in SPI port while chip select (here labeled “CS”) uses an I/O pin. The second SRAM chip is wired into the same 3 SPI port pins and only requires one more micro I/O for a second chip select. This is an example of an application that requires a great deal of memory storage to buffer data. But, it does not require a great deal of processing power, it just needs to temporarily handle a large amount of data.

PTM Published on: 2011-11-03