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SHA-256 Authenticators for IP Protection Slide 5
To illustrate how the challenge and response process works in a digital system, this slide here shows a simple, single-device example. An authentication system consists of two parts: a host system that incorporates a coprocessor combined with a microcontroller or FPGA and a connected device with a authenticator IC attached. When the device is connected to the host, the following authentication process begins: First the Micro or FPGA generates a random number and sends it to the Authenticator within the connected device; this is the challenge or unique question. The Authenticator then takes that random number, combines it with a secret key and other data. It then uses the Authenticator’s SHA-256 engine and produces a Message Authentication Code, or MAC. This is the response or unique answer, and it gets saved by the host. Next, the micro or FPGA sends the same challenge to the Coprocessor which makes the same exact calculation using its SHA-256 engine. The Host Microcontroller or FPGA compares the HOST response with the Device response. If these match the device is authentic. If not, the host disables the device.
PTM Published on: 2014-08-05