High-speed DACs with update rates of hundreds or even thousands of MHz use complex differential current-output architectures built with CMOS current sources and CMOS switches. The complex structure is required because a simple ladder network is not fast enough, and it is almost impossible to make either a thermometer DAC or a binary-weighted DAC with sufficiently high resolution. The differential outputs have compliance of around ±1V, unlike switched resistor DACs where the current output must be very close to ground potential.