Communication at the Core of New Sensors

One of the current drivers for use and management of systems based on sensor input is the Internet of Things. These devices incorporate a variety of sensors and control systems that communicate with a main computer or gateway to collect and analyze data. Due to the form factor for most of these new “smart” devices, they are incorporating direct network connections (MAC and PHY) into the parts. The majority of these devices use Internet Protocol to transfer information. Power Line Communication and Ethernet controllers are the preferred IP-based architectures. A number of products exist – ranging from basic PHY and MAC devices to full networking controllers – that can be incorporated into microcontroller-based systems.

Networking hardware blocks

The network interface for embedded solutions is generally implemented as three blocks: the PHY, the MAC, and a transmit/receive block.

The PHY is the physical layer, also known as Layer 1 of the OSI stack. It includes the PLLs that handle the data recovery, and has encoders for various protocols and it contains multiple transmitter/receiver pairs. Multi-protocol PHYs need to support different encoding schemes such as Manchester encoding (10 Mbps) and 4B/5B encoding (100 Mbps).

The MAC is the Media Access Control block and handles the flow control, transmit and receive buffers, and the Medium Independent Interface (MII) management logic. The MAC primarily manages the data flow using the 802.3 Ethernet protocol, also known as Layer 2 of the OSI network stack.

The two functions and their associated transceiver pairs are available in multiple forms for use in different systems designs. There are PHY products, for those systems that have programmable logic and high-speed microcontrollers, that can perform the MAC function and there are complete PHY/MAC products that integrate both pieces for systems without excess computing resources. Figure 1 shows the basic structure of the OSI network stack and the blocks that make up Layers 1 and 2.

When using Ethernet communication, it is important to understand what data will be transferred, and this necessitates the configuration of the TCP/IP stack for the controller. An explanation of the data and protocol options can be found in supplier application resources such as the AN3000 Application note from STMicroelectronics. This application note goes over the basics of the layers in the OSI stack (Layer 1 thru Layer 7) and then identifies the transport methods, as well as how to implement data control using their STM32F107xx microcontroller. Figure 2 shows the protocol interconnect sequence for the data that enables you to partition the system along the transition lines between layers. For further information on how Ethernet protocols work and the OSI stack, the DigiKey website has multiple applications notes on Ethernet from a host of suppliers.

Stand-alone controllers

An example of a stand-alone Ethernet controller is Microchip’s ENC28J60 (see Figure 3). This is a typical chip that is used to connect an existing system or design that lacks connectivity to a network. The Ethernet controller is designed to take a standard serial data stream that may have been intended for a USB/serial port/JTAG connection, and then format the data for compatibility with the wired Ethernet 802.3 protocol and interface.

As a stand-alone controller, the device offers the following seven major functions as blocks:

1. An SPI interface that serves as a communication channel between the host controller and the ENC28J60
2. Control registers that are used to control and monitor the ENC28J60
3. A dual-port RAM buffer for received and transmitted data packets
4. An arbiter to control the access to the RAM buffer when requests are made from DMA, transmit, and receive blocks
5. The bus interface that interprets data and commands received via the SPI interface
6. The Media Access Control (MAC) module that implements IEEE 802.3 compliant MAC logic
7. The PHY module that encodes and decodes the analog data that is present on the twisted-pair interface

The device also contains other support blocks such as an oscillator, on-chip voltage regulator, level translators to provide five volt tolerant I/Os, and system-control logic.

A typical application might connect the stand-alone device to a microcontroller and then have the output drive the CAT5 cable for the Ethernet connection though a transformer and pull down resistors. A sample configuration for such an application is shown in Figure 4, which details the transformer and resistor connections.

One challenge in the selection of stand-alone controllers is the choice of speeds and interfaces. Microchip’s ENC28J60T supports a 10/100/1000 Mbps PHY. However, the MAC, encoders, buffers, and logic only support a 10 Mbps interface. The 10 Mbps port will be compatible with a 10/100/1000 connection, but only at the lower data rate.

Ethernet PHY controllers

The alternative to a stand-alone Ethernet controller is a transceiver with a separate driver and encoder for the actual cable connection. These parts are available from a number of suppliers such as STMicroelectronics, Texas Instruments/National Semiconductor, Micrel, and others.

Using a PHY rather than a stand-alone full Ethernet controller enables the sensor system designer to create the data interface in the MAC that is best suited for their device. This is a key feature for a number of low power and mobile sensor systems, in that the full logic for the protocol and interface may not be required and a simpler MAC can be implemented. A typical use architecture for the block, the Texas Instruments’ TLK100 single port 10/100 PHY, is shown in Figure 5.

The Texas Instruments’ TLK100 is designed for multiple applications and features power supply flexibility. It can operate with a single 3.3 V power supply or with a combination of 3.3, 1.8, and 1.1 V power supplies. For low-power operation, the TLK100 uses mixed-signal processing to perform equalization, data recovery, and error correction, and achieves robust operation over standard CAT5 twisted-pair wiring. It not only meets the requirements of IEEE 802.3, but also maintains high margins in terms of cross-talk and line noise.

Continuing with single-channel Ethernet controllers, Texas Instruments/National Semiconductor’s DP3838M PHYTER 10/100 transceiver is targeted at single-voltage (3.3 V) space-constrained applications. The part comes in a 6 mm x 6 mm, 40-pin plastic LLP package. Even though it comes in a small package, it supports the full 4 KV human body ESD model and can drive up to 137 meters of CAT5 cable. In industrial applications, this extended reach on a small device is critical for a large number of locations.

For these space-constrained designs, the part also has a pin for an externally accessible 25 MHz clock that can be used to synchronize the PHY with the MAC logic. This both improves the signal integrity and eliminates the need for an additional external clock or oscillator. Further adding function to the sensor systems, this part also has 10/100 Mbps built-in self-test (BIST) logic. This software-accessible feature enables the final system to be tested and error modes identified while in the installed and operating configuration, without the need for external test equipment.

One of the challenges in these systems is determining if a problem is a cable issue or an electronic issue. A block diagram for the DP83848M is shown in Figure 6. Additional implementation details and support are available in the TI PHYTER family Product Training Module.

High-speed interfaces

Advanced sensor systems may aggregate multiple sensors into a single reporting device. In that case, a higher-speed interface is needed beyond the 10/100 Mbps interfaces. For these applications, there are parts such as Micrel’s KSZ9021RL/RN 10/100/1000 PHY. This part integrates an 802.3-compliant interface for 10Base-T/100Base-T transceivers using Manchester/MLT-3 signaling, as well as a proprietary 1000Base-T transceiver. The part also simplifies the application of the chip by including on-chip the termination resistors for the four differential pairs needed for signaling. It also includes an integrated LDO controller that uses a single external MOSFET to supply the high-speed 1.2 V core with power. This enables the part to connect with a single 3.3 V supply. The design also supports both 3.3 V and 2.5 V logic levels to the MAC with the single 3.3 V supply.

The Micrel part automatically detects and corrects for differential pair misplacement, polarity reversals, and propagation delays while re-syncing timing between the four differential pairs, all of which is important in systems that may have retrofitted cabling and are being upgraded to add communication channels. The block diagram for a tri-speed PHY is slightly different from the standard 10/100 PHY as shown in Figure 7.

Interface to sensors

All of these network communication interfaces work from a main microcontroller or processing core. The core controller handles the data creation and formatting from the sensors and prepares the data for communication to other devices. Typically, the core will have a small buffer or local memory, so several recent data readings can be stored.

In this scenario, the full stand-alone Ethernet controllers will use a serial data port to connect to the controller and transfer the data over the network to long term storage. This partitioning of the system allows sensor data collection and formatting to take place independent of and asynchronous to the network data traffic.

The PHY chips allow for a greater variety of options for the interface. Since the MAC logic is generated in the same block as the microcontroller, there are a number of options for transferring the data. If the controller block is an FPGA, you can use an embedded controller, share a memory block, and create the custom MAC logic. Other options include on-chip registers that are connected as FIFOs to serially drive data to the MAC function.

Some microcontroller solutions, such as connectivity-aware systems from NXP Semiconductors, Freescale Semiconductor, Analog Devices, Microchip, and Texas Instruments, have Ethernet interfaces that include a pre-designed and qualified MAC. These blocks just need the serial data interface to the PHY blocks and the magnetics in order to connect to a cable.

The interface connectivity for standard copper cable (CAT5 or CAT6) networks is fairly well-defined and separated from the sensor function. The networking configuration allows data transfer over a long distance via cable, isolating sensors from everything other than local environmental conditions. The data size and frequency of collection are not a challenge for Ethernet communication and do not impact the operation of the sensor.

Once the data is transferred to the digital network, it can go to local machines using either data or Hadoop-style repositories. These repositories can now exist locally or in the cloud; in either case, access to the data from a computer or a mobile device is possible. Since the network is based on bi-directional traffic, as information and data go out for review and analysis, control signals and configuration changes of these sensor systems can arrive simultaneously from remote devices.

This bi-directional and scripted network world is IP-based. Taking sensor data and delivering it over an IP-based network enables a far more detailed level of analysis of data than was previously possible.

Summary

Sensors have transitioned from being simple reporting devices to being an integral part of a closed-loop control system, even in simple home automation. The driver for this change is the collection and analysis of the sensor data by off-site and cloud-based computer systems. These systems allow for both user control and modification of the remote environment. The key element to enabling these new IoT devices is their connectivity to a computer network through an IP connection. The most popular methods include Ethernet for a traditional wired network, and PLC networks that allow for wired communication without additional wiring.

References:

1. STMicroelectronics’ TCP/IP stack AN3000 application note