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Virtex-6 FPGA Slide 5

Using process, architectural, and software innovations, AMD has made major advances at the 40 nm process node in Virtex-6 FPGAs, reducing static, dynamic, and I/O power significantly over previous generations of FPGAs. Comparing Virtex-6 to Virtex-5 FPGAs, the average static power in Virtex-6 devices is 50% lower and dynamic power is 40% lower. Additionally there have been I/O power improvements in the form of dynamic termination.

PTM Published on: 2012-04-11