Implementing a power sequencing scheme is good design practice. When all voltage rails of a system turn on suddenly, the primary power supply has a large demand at once, and must accommodate inrush currents from each rail. This leads to overdesign of the primary power supply. When the primary power supply is overburdened, the output voltages may fall below a DC/DC converter’s under voltage lockout threshold and suddenly shut down. The Artix 7 and Kintex 7 FPGAs require a simple sequencing scheme in which VCCINT powers first, VCCAUX powers up second, and VCCO powers up third. Power-down sequence should be controlled in the reverse order. This type of staggering sequencing scheme is fairly easy to implement. One method has the Power good pin of one converter enable another converter. When the first converter reaches its set-point voltage, the Power-good pin voltage is logic-high and used to turn on the other converter. DC/DC converters with tracking or sequencing pins can time the start up of one converter with respect to another converter, and implement sequential, ratio-metric, or simultaneous sequencing scheme. When Power-Good or tracking pins are not available, a Supply Voltage Supervisor or special sequencer integrated circuit can be used to turn on voltages as needed.