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M3 Overview

The LPC1700 series is based on the ARM Cortex-M3 core, revision two. This core offers several enhancements over the ARM7 core, including advanced math features like single cycle multiply and hardware divide. This core also gives an option to add a new Memory Protection Unit (MPU) which allows users to protect up to eight distinct memory regions from accidental over-writes. The Cortex-M3 core also adds a Nested Vectored Interrupt Controller (NVIC) that provides for fast, deterministic interrupts with up to thirty-two priority levels. Finally, NXP has chosen to add the optional core block called the Wake-Up Interrupt Controller (WIC) that allows for quick, elegant exits from sleep states due to any user-chosen priority interrupt.

PTM Published on: 2011-05-06