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Packages Image of Allegro MicroSystems' Electrical Isolation Diagram

Shown here are uniquely effective, patented packaging techniques for Hall-effect current sensor ICs employed in an SOIC8 flip-chip package. The current to be sensed flows through the conductive copper path between the two pins at the upper left corner of the package and the two pins at the upper right corner of the package. The Hall-effect IC is assembled into the package using standard flip-chip assembly techniques. There are three major advantages resulting from it. First, the Hall-effect sensing element is in close proximity to the current-carrying conductor, thereby maximizing magnetic coupling and signal-to-noise ratio that improves device accuracy. Second, the Hall-effect IC is not in contact with the integrated conductor, thereby maintaining voltage isolation and enabling working voltages as high as 500 VRMS needed on the DC side of the PV inverter and in-line voltage applications. Solder bumps attached to the low-voltage input/output pads on the Hall IC make contact with the lead fingers shown in the upper portion of the right figure. Finally, since the Hall-effect current sensor linear IC is fully integrated, it allows Allegro to factory-program the device to compensate for zero amp and sensitivity variation over-temperature.

PTM Published on: 2011-10-13
PTM Updated on: 2020-11-13