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Hardware Design with the RP2040 Part 2: PCB Layout

2021-06-28 | By ShawnHymel

License: Attribution

Previously, we talked about how to create a schematic for your own RP2040-based PCB design. 

In this follow-on article, we’ll give you some tips for laying out a board with the RP2040.

The board schematic and layout files (created in KiCad v5.1) can be found here: https://github.com/ShawnHymel/rpi-pico-debugger-shoe

See here if you would like to view this content in video form:

 

Recommended Reading

Before getting started, we highly recommend going over some documents (or videos) or having them handy to use as a reference:

Part Layout and Board Outline

The most important step in any layout process is to organize your components and determine the board outline shape (not necessarily in that order). 

Component placement in KiCad

For this project, I wanted to keep something with the same basic shape as the Raspberry Pi Pico. However, the minimum board requirements for DKRed (at the time of writing) were 1 inch for either dimension. Because the Pico is about 0.8 inches wide, I had to extend the sides out to have that board meet the 1 inch minimum.

Rather than just waste space over the breadboard, I decided to add pin numbers in silkscreen. At the very least, these would help me create circuits on the breadboard for prototyping, as the pin numbers are only available on the underside of the Pico (and online).

As you can see, the components are squeezed pretty tightly into the Pico-sized shape. This is because I chose larger components for hand soldering (with the exception of the RP2040, which only comes in a QFN package). The 0603 decoupling capacitors made routing out from the RP2040 especially tricky.

I added a “tail” to the board with a header for the target SWD connections. My thought was to offer two options for connecting the target Pico SWD:

  • Solder headers to the underside of the Pico on the SWD port and have it mate with a header on this debugger shoe. However, this would mean the Pico would no longer fit into a breadboard by itself.
  • Use jumper wires to connect the debugger to the target Pico’s SWD port, which means the board had to be extended slightly to allow for this extra header.

Design Rules

I set the minimum constraints as follows. They were based on the minimum design rules as set out by OSH Park, which are more conservative than what I ultimately plan to build. DKRed offers smaller track width/clearance constraints, but I wanted this board to be able to be produced by nearly any fab house.

KiCad minimum design rules

I defined the net class parameters as follows. Most traces were given by the default class, but I tried to make the USB power and 3.3V traces as wide as possible (to carry at least 500 mA). 

Setting net class rules in KiCad

The USB data lines were calculated to be 0.77 mm wide with 0.15 mm separation on a top layer with a ground plane 1.6 mm below. This resulted in an ideal differential impedance of 90 Ω with the following assumptions given in the screenshot below. See this post on how to calculate differential pair trace parameters.

KiCad differential pair calculator

Routing Traces

Here, you can see the top layer of the PCB:

Top layer of RP2040 board in KiCad

Here is the bottom layer of the PCB:

Bottom layer of RP2040 PCB in KiCad

A few notes about the layout:

  • I routed USB lines first so that they would have a direct shot to the RP2040 without needing to move to a different layer (to avoid the 90-degree bends in the vias). While this type of outside-layer routing of USB lines isn’t ideal it should work well enough.
  • From there, I routed the power lines, as they’re usually wider than the rest of the traces. They also often need to make many connections, so it’s helpful to have a large trunk that branches off to make the necessary connections.
  • The RP2040 layout guide recommends 9 vias on the middle ground pad to a ground plane to provide a good current path and assist with heat dissipation. Because of the crowding of the bottom side traces, I could only get 6 vias on the pad. I hope this compromise is good enough.
  • The traces going to the crystal should really be as straight and short as possible while being length-matched. Once again, the 0603 capacitors gave me some crowding issues, so I had to route the crystal lines to the side to avoid them. It’s another compromise that I hope “just works.”
  • I provided solder jumpers to the TX/RX UART debugging lines as well as VSYS, should the user ever wish to disconnect those lines from the target Pico.
  • The fiducials were added mostly out of habit. I highly doubt I’ll ever use a pick-and-place machine to populate the components on this board.
  • I left out silkscreen markers for pins 0 and 1 as a reminder that those pins are used by the debugger.
  • I prefer to keep REFDES markers for the components in silkscreen, as it helps me remember where parts go when I’m hand-placing them.

Plotting Gerbers for PCB Fabrication

Here are the Gerber file specifications I used for the plotting step:

KiCad Gerber file specifications

Here are the drill file specifications I used for creating the drill files:

KiCad drill file specifications

I chose to keep the PTH and NPTH files separate, as I’m hoping the fabrication process will not plate the mounting holes.

Edit: DKRed plates all holes. It would be better to select "PTH and NPTH in single file" if you're planning to use DKRed.

I zipped these gerbers up and sent them off to Digi-Key’s new PCB fabrication process, DKRed. I recommend giving it a shot for your next prototyping run of PCBs. There is a minimum order of 4 PCBs, so that’s what I ordered. 

Conclusion

I hope this helps you get started creating your own RP2040 PCB layout! In the next article, I plan to solder the components to the PCB and see if I can program the RP2040.

Recommended Reading

Hardware Design with the RP2040 Part 1: Schematic

Hardware Design with the RP2040 Part 3: Soldering and Testing

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