5P49V5943/5944 VersaClock 5 Programmable Clock Generator

In this reference design, the 5P49V5943/5944 device accepts one clock input as its reference. The clock input (CLKIN, CLKINB) is a fully differential input that accepts differential clocks from all the differential logic types. It can be also driven from a single-ended clock on one of the input pins. The OTP interface of the device can be used to store configurations. The SEL1 and SEL0 pins are used to select a configuration stored in the OTP memory. The SD/OE pin is responsible for enabling/disabling the outputs of the device or powering down the chip. The device has two outputs (OUT1, OUT2) with complementary outputs (OUT1B, OUT2B) that can release LVCMOS clock output frequencies ranging from 1MHz up to 200MHz or 1MHz to 350MHz LVDS, LVPECL, HCSL differential clock outputs. These outputs may be enabled or disabled individually through its register bits.

The high performance 5P49V5943/5944 device is ideal to applications requiring a very stable clock generator. The programmability of its loop bandwidth, outputs, slew rate, etc., allows optimization in every application it is being used. This device can be used in application like Ethernet switch/router, printer, PCI express, processor/FPGA clocking, etc. For more information on how to configure the device, please refer to its datasheet.