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RZ/V2L Block Diagram 1

This is the block diagram of RZ/V2L. The main feature of this product is that it is equipped with Renesas' proprietary AI accelerator, DRP-AI. This device is developed in 28 nm process technology and equipped with the latest Arm Cortex-A55 with two cores. The maximum operating frequency of Cortex-A55 is 1.2 GHz. Moreover, it has a Cortex-M33 which operates at 200 MHz as a sub microprocessor. It is equipped with 128 KB built-in RAM and supports error correction code. Video and graphics capabilities are essential for HMI equipment. As a 3D GPU, it is equipped with Arm Mali-G31 GPU, and it is possible to display 3D graphics. In addition, it is equipped with an H.264 video codec that supports full HD resolution, enabling video recording and playback. It is equipped with two channels of Gigabit Ethernet and can be used for gateway systems. In addition, the CAN interface used in industrial applications supports CAN-FD, which has a higher communication speed. Two types of packages are available depending on the pin pitch, and the customer can choose from 0.5 mm pitch 456 pins and 0.8 mm pitch 551 pins.

PTM Published on: 2022-08-03