This slide summarizes the key differences between the CISC and RISC architectures. The CISC architectures rarely have any pipelines while all of the ARM cores implement them with varying complexity. Additionally, the ability to operate in different modes significantly improves the ARM cores ability to respond to interrupts and enable deterministic responses. The ARM cores also support some backward compatibility to some instruction sets with the thumb instructions. However, these additional features and modes come at a slight increase in complexity with more registers to track.