Slide 1
Slide 2
Slide 3
Slide 4
Slide 5
Slide 6
Slide 7
Slide 8
Slide 9
Slide 10
Slide 11
Slide 12
Slide 13
Slide 14
Slide 15
Slide 16
Slide 17
Slide 18
Slide 19
Slide 20
Slide 21
Slide 22
Slide 23
Slide 24
Slide 25
Slide 26
Slide 27
Slide 28
Slide 29
Slide 30
Slide 31
Slide 32
Slide 33
Slide 34
Slide 35
Slide 36
Slide 37
Slide 38
Slide 39
Slide 40
Product List
The prefetch buffer is constantly in use. As shown above, the instructions are stored in the Pre Fetch Buffer (PFB) and supplied to the processor from here. Another speculative fetch begins as the ARM core is executing from the PFB and this data gets loaded into the data latch. As soon as the last instruction in the Quad is executed, the data is transferred to the Pre Fetch buffer and the process starts again.
PTM Published on: 2011-11-02