The onboard flash is implemented in the same process as the ARM7 core and is 128 bits wide in NXP’s latest generation of microcontrollers, the LPC2300 and LPC2400.  Depending on the running mode, ARM or Thumb, 4 or 8 words are fetched respectively. The MAM attempts to improve memory access in the cases of non sequential code execution by engaging in 3 activities. 1) Prefetching occurs constantly which enables the 0 wait state nature of the FLASH. 2) The Data bypass buffer assumes the next data fetch will also be sequential to the last data fetch, avoiding the delay required to fetch data stored in a different location than the instruction. 3) The Branch trail buffer stores the next instructions after a branch trail so that when the branch is completed, the primary instruction set can continue execution with no slow down. Additionally, these buffering activities are being performed simultaneously on two equal sized banks of memory within the onboard memory, further improving performance.