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LPC29xx Microcontrollers Slide 19
CGU0 takes the external crystal oscillator output and feeds it to the PLL. Once the PLL output clock is generated it is possible to use a three-phase output control which generates three clock signals separated in phase by 120°. Five clocks are generated in this stage, three from the PLL, and two direct outputs from the oscillators. All five clocks generated in this stage are used as inputs for stage 3.
PTM Published on: 2011-11-02