The Branch Trail Buffer is another important aspect of the Memory Accelerator Module. If the core requires an instruction that is at a non-sequential address as a result of a branch, the Memory Accelerator Module will flush the Data Latch and re-access a new address in Flash, unless the address is found in the Pre Fetch Buffer or the Branch Trail Buffer. When this happens, the instruction quad containing this non-sequential instruction is stored in the Branch Trail Buffer. Then, if we are in a loop, the next time this non-sequential instruction is required,  it will already be in the Branch Trail Buffer and the Data Latch does not need to be flushed nor is a Flash access required. In short, you have a Von Neumann memory, but it gets separated into data and instructions, including the most recent instruction that was branched to. So, there are a number of instructions that are available for the program to fetch out of immediate memory, without having to access Flash memory.