For low stress staged start, a small economical MOSFET, Q1, is selected for the stress path, lowering total MOSFET cost. The inrush current level is set to a few amps with a resistor-capacitor combination on Q1’s gate. Q1 is protected with a low current limit by selecting a large sense resistor. Load current and MOSFET Q2 are held off at startup with GPIO1 configured as a power good signal. Q1 trickle charges the load capacitance over a long period of time spanning tens of milliseconds, lowering the startup stress. After the output charges and power good goes high, the parallel R_DS(ON) path with Q2 is enabled to carry the full load current. During current limit or input voltage steps, the R_DS(ON) path may not turn off if the output voltage does not fall below the power good threshold. Hence, a short fault timer is chosen to protect Q2. Therefore, the low stress configuration has limited ride-through capability for load surges and input voltage steps, and cannot start into a load.