Another common block needed for FPGAs is a DDR DRAM Controller. As is the case with the MIPI/CSI controller, power, and size are much lower when they are hardened blocks Vs done in the FPGA Logic. Efinix’s DDR DRAM controller supports DDR3, LPDDR3, and LPDDR2, with DDR3 Efinix can support up to 1066 Mbps speeds, and 800 Mbps for LPDDR2 and LPDDR3. Depending on the package and size of the device, Efinix can support 32-bit wide data or 16-bit wide and memory densities up to 8 Gbit. Shown here is how the customer would interconnect the hard hardened block to the FPGA fabric.