Intel's 28-nm FPGA Portfolio: the Measurable Advantage

Designs are becoming increasingly complex, as system performance, power, and cost requirements continue to expand and conflict. Because a one-size-fits-all approach doesn't work, Intel has developed a 28-nm device portfolio for your unique design requirements.

In Intel’s portfolio, you'll find the broadest array of 28-nm devices, united by a common design environment designed to enhance your productivity. Whether your designs are at the high end, low end, or somewhere in between, you'll find a device that meets your requirements. What's more, you can differentiate your products without having to sacrifice one capability or advantage to gain another.

Intel’s 28-nm device families include:

  • Cyclone® V FPGAs, providing the industry's lowest system cost and power FPGAs
  • Cyclone V SoC FPGAs, integrates an ARM-based HPS
  • Arria® V FPGAs, balancing cost and power with performance for mid-range applications
  • Arria V SoC FPGAs, integrates an ARM-based HPS
  • Stratix® V FPGAs, delivering devices built for bandwidth

FPGA Families Overview

Cyclone® V FPGAs

Altera Cyclone5

Developed on TSMC’s 28-nm Low Power (28LP) process, the Cyclone V family provides customers the lowest power and lowest cost at optimal performance levels needed for today’s high-volume, cost-sensitive applications. The family also includes variants with an integrated dual-core ARM®-based hard processor system (HPS) enabling over 4,000-MIPS processing performance for under 1.8 W, that deliver 40 percent lower total power versus the previous generation. Other features of Cyclone V include:

  • The industry’s absolute lowest-power serial transceivers, with 88-mW power consumption per channel;
  • 800-Mbps DDR3 with integrated hard memory controllers;
  • PCI Express® (PCIe®) Gen2 hard intellectual property (IP) blocks with multifunction support

The Cyclone V family also offers the widest density range of 28-nm FPGAs effective for industrial, wireless, wireline, military and automotive applications.

The family comes in six targeted variants:

FPGAs

  • Cyclone V E FPGA with logic only
  • Cyclone V GX FPGA with 3.125-Gbps transceivers
  • Cyclone V GT FPGA with 5-Gbps transceivers

SoC FPGAs

  • Cyclone V SE SoC FPGA with ARM-based HPS and logic
  • Cyclone V SX SoC FPGA with ARM-based HPS and 3.125-Gbps transceivers
  • Cyclone V ST SoC FPGA with ARM-based HPS and 5-Gbps transceivers

Arria® V FPGAs

Altera Arria5

Arria V 28-nm FPGAs consume 40 percent less power than the prior generation, and enable the industry’s lowest power transceivers in midrange FPGAs, which use less than 105 mW per channel at 6 Gbps and less than 165 mW per channel at 10 Gbps. Arria V FPGAs use the lowest total power while providing optimized performance for midrange applications, such as remote radio units, Long-Term Evolution (LTE) wireless communication equipment, in-studio mixers, and 10G/40G line cards.

Arria V FPGA Family Variants:

Variant

Description
Arria V GZ FPGA Highest bandwidth midrange FPGA wth up to 36 backplane-capable 12.5 Gbps transceivers.
Arria V GT FPGA Lowest power mid-range FPGA for applications that require up to 20 transceivers at 10.3125 Gbps and SFF 8431 compliance
Arria V GX FPGA Lowest power midrange FPGA for applications that require up to 32 backplane-capable 6.5536 Gbps transceivers
Arria V ST FPGA SoC FPGA with ARM-based HPS and 10.3125 Gbps transceivers
Arria V SX FPGA SoC FPGA with ARM-based HPS and 6.5536 Gbps backplane-capable transceivers

Stratix® V FPGAs

Altera Stratix5

Stratix V FPGAs are the only FPGAs optimized on TSMC's 28-nm High Performance (28HP) high-K metal gate (HKMG) process with more than a one speed-grade advantage over competing devices. Stratix V FPGAs are the industry’s only production monolithic devices with 28-Gbps integrated transceivers. Other Stratix V features include:

  • The highest memory interface capability with 2,133-Mbps DDR3 support;
  • 2.5 TMACs of digital signal processing (DSP) performance;
  • PCIe® Gen3 x8 support.

Combined with the added benefits of increased flexibility of partial reconfiguration and Configuration via Protocol (CvP) using the existing PCIe link, Stratix V FPGAs allow designers to increase their system performance and bandwidth while reducing power. These improvements meet the demands of high-performance applications, including Gigabit Ethernet (GbE) line cards, military radar, optical transport network (OTN), and studio server applications.

Stratix V Family Variants:

Variant

Description
Stratix V GT FPGA Optimized for applications with 28.05 Gbps transceivers requiring ultra-high bandwidth and performance, such as 40G/100G/400G applications
Stratix V GX FPGA Optimized for high-performance, high-bandwidth applications with integrated transceivers supporting backplane, chip-to-chip, and chip-to-module operation at up to 14.1 Gbps
Stratix V GS FPGA Optimized for high-performance, variable-precision digital signal processing (DSP) applications with integrated transceivers supporting backplane, chip-to-chip, and chip-to-module operation at up to 14.1 Gbps
Stratix V E FPGA Optimized for ASIC prototyping with 952K logic elements on the highest performance logic fabric